Some microelectromechanical systems (MEMS) as well as some highly integrated components appertaining to microelectronics require relatively deep cavities, holes or cutouts. By way of example, in MEMS technology the actual MEMS structures are often patterned at a first surface of a semiconductor substrate (for example the upper surface or a front side). Depending on the type of MEMS component, it may be necessary for these structures present at the first surface or at the front side also to be made accessible from a second surface or rear side of the semiconductor substrate, wherein the second surface is arranged opposite to the first surface with respect to the semiconductor substrate. One example is a pressure sensor whose membrane is provided at the first surface or front side of the semiconductor substrate by means of a MEMS technology, but additionally also requires an access from the second surface or rear side, via which access the membrane can be subjected to the pressure to be measured. Further examples are acoustic transducers (loudspeaker or microphone) and acceleration sensors. The production of cavities on silicon wafers (generally: wafers composed of semiconductor material) which are used for the production of MEMS (microelectromechanical systems) components (for example pressure and acceleration sensors) of any type (sensors and actuators) constitute a frequently occurring objective in MEMS technology.
At the present time, these cavities are typically implemented in ultra-pure silicon by means of anisotropic electrochemical etching in TMAH (tetramethylammonium hydroxide). Etching using TMAH is a wet-chemical etching method. Purely wet-chemically etched cavities typically have a relatively large extent in terms of area, since etching is performed selectively with a naturally predefined sidewall angle of 54.7° (etching-selectively predefined crystal angle between the Si <100> and Si <111> planes). To put it another way, typically only a relatively low aspect ratio can be obtained with a wet-chemical etching method. Aspect ratio typically denotes the ratio of the depth of a structure to its (smallest) lateral extent.
The wet-chemical etching methods also include so-called electrochemical etching. Electrochemical etching (ECE) for dopant-selective removal of silicon is a method for automating and selectively controlling the etching process. In general, an active pn junction is required and both types of dopants can serve as an etching-resistant material (“etching stop”). Electrochemical etching can be used in combination with an anisotropic etching method in order to be able to control for example the thickness of MEMS structures (e.g. membrane thickness in the case of piezoresistive pressure sensors) with high accuracy. The selectively doped regions required for this purpose can be created for example by implantation, diffusion or epitaxial deposition of silicon or some other semiconductor material. The etching depth (and thus, if appropriate, also the thickness of corresponding MEMS structures) can be controlled in an electrochemical etching method with an accuracy of approximately 0.05 μm, under certain circumstances even with an accuracy of approximately 0.03 μm.
It would be desirable to be able to provide a method for producing at least one cavity within a semiconductor substrate which combines the possibility of an etching stop that is controllable with relatively high accuracy with the highest possible obtainable aspect ratio of the cavity produced. Alternatively or additionally it would be desirable to be able to produce one or more cavities in a semiconductor substrate which require as little area as possible at the surface from which cavity(-ies) proceed(s). Furthermore, it would alternatively or additionally be desirable to be able to produce one or more relatively deep cavities in a semiconductor substrate as cost-effectively and/or as rapidly as possible.